/***                   LISTING 1                ***/
/***                                            ***/
/***                    serial.h                ***/

#include <dos.h>

#define COM1      0
#define COM2      1
#define COM3      2
#define COM4      3

#define COM1BASE  0x3F8  /* Base address for COM1 */
#define COM2BASE  0x2F8  /* Base address for COM2 */
#define COM3BASE  0x3E8  /* Base address for COM3 */
#define COM4BASE  0X2E8  /* Base address for COM4 */

/*** ****************************************** ***/
/***    8250 UART user accessible registers     ***/
/***    offsets relative to COMBASE address.    ***/
/*** ****************************************** ***/

#define TXR    0     /* Transmit register (WRITE) */
#define RXR    0     /* Receive register  (READ)  */
#define IER    1     /* Interrupt Enable          */
#define IIR    2     /* Interrupt ID              */
#define LCR    3     /* Line control              */
#define MCR    4     /* Modem control             */
#define LSR    5     /* Line Status               */
#define MSR    6     /* Modem Status              */
#define SRP    7     /* Scratch Pad               */
#define DLL    0     /* Divisor Latch Low         */
#define DLH    1     /* Divisor latch High        */

/*** ****************************************** ***/
/***    INTERRUPT ENABLE REGISTER (OFFSET 1)    ***/
/*** ****************************************** **

 Bit values of the Interrupt Enable Register (IER).

  bit            meaning
  ---            -------
   0             Interrupt when byte is recieved.
   1             Interrupt when transmitter hold-
		 ing register is empty.
   2             Interrupt when there is an error
		 in data reception.
   3             Interrupt when any RS-232 inputs
		 change states.
   4-7           Not used. (Always 0)
						  */
#define RX_INT          0x01
#define TBE_INT         0x02
#define ERR_INT         0x03
#define RS_INT          0x04

/*** ***************************************** ***/
/*  INTERRUPT IDENTIFICATION REGISTER (OFFSET 2) */
/*** ***************************************** **

 Bit values of the Interrupt Identification (IIR).

  bit            meaning
  ---            -------
   0             0 = Interrupt pending. 
   1-2           Interrupt ID code
		   00 = RS-232 input
		   01 = Transmitter buffer empty
		   10 = Data received (RX_ID)
		   11 = Reception error, or BREAK.
   3-7            Not used.                     */
		 
#define RX_ID           0x04
#define RX_MASK         0x07

/*** ***************************************** ***/
/***     LINE CONTROL REGISTER (OFFSET 3)      ***/
/*** ***************************************** **

 Bit values of the Line Control Register (LCR).

  bit            meaning
  ---            -------
  0-1            00 = 5 bits 
		 01 = 6 bits 
		 10 = 7 bits 
		 11 = 8 bits.
  2              Stop bits.
  3              0 = parity off
		 1 = parity on.
  4              0 = parity odd
		 1 = parity even.
  5              Sticky parity.
  6              Set break.
  7              Toggle port addresses. (DLAB)    */

#define NO_PARITY       0x00
#define EVEN_PARITY     0x18
#define ODD_PARITY      0x08
#define DLAB            0x80

/*** ***************************************** ***/
/***     MODEM CONTROL REGISTER (OFFSET 4)     ***/
/*** ***************************************** **

 Bit values of the Modem Control Register (MCR).

  bit            meaning
  ---            -------
   0             1 assert DTR (Data Terminal Ready)
   1             1 assert RTS (Request to Send)
   2             User definable output.      (GPO1)
   3             Enable Interrupts on 8250.  (GPO2)
   4             Local Loopback Test.
   5-7           Not used. (Always 0)
						 */
#define DTR             0x01
#define RTS             0x02
#define GPO1            0x04
#define GPO2            0x08
#define EN_INT          0x08

/*** ***************************************** ***/
/***      LINE STATUS REGISTER (OFFSET 5)      ***/
/*** ***************************************** **

 Bit values held in the Line Status Register (LSR).

  bit            meaning
  ---            -------
   0             Data ready.
   1             Overrun error.
   2             Parity error.
   3             Framing error.
   4             Break detect.
   5             Transmitter buffer empty.
   6             Transmitter empty.
   7             Time out.                       */

#define RCVRDY          0x01
#define OVRERR          0x02
#define PRTYERR         0x04
#define FRMERR          0x08
#define BRKERR          0x10
#define XMTRDY          0x20
#define XMTRSR          0x40
#define TIMEOUT         0x80

/*** ***************************************** ***/
/***     MODEM STATUS REGISTER (OFFSET 6)      ***/
/*** ***************************************** **

 Bit values held in the Modem Status Register (MSR).

  bit            meaning
  ---            -------
   0               Delta CTS.
   1               Delta DSR.
   2               Delta RI.
   3               Delta DCD.
   4               CTS (Clear to Send).
   5               DSR (Data Set Ready).
   6               RI (Ring indicator).
   7               DCD (Data Carrier Detected).  */

#define D_CTS           0x01
#define D_DSR           0x02
#define D_RI            0x04
#define D_DCD           0x08
#define CTS             0x10
#define DSR             0x20
#define RI              0x40
#define DCD             0x80

/*** ***************************************** ***/
/***     SCRATCH PAD REGISTER (OFFSET 7)       ***/
/*** ***************************************** **

  This register has no function and may be use  
  as any other byte of RAM, but note that this 
  register does not exist on early versions of
  the 8250.
						 */
/*** ***************************************** ***/
/***     LSB & MSB BAUD RATE DIVISOR LATCH     ***/
/***             (REGISTER  8 & 9)             ***/
/*** ***************************************** **

  These two register are use to generate the
  baud rates.  They are reached by setting the
  DLAB bit of the LINE CONTROL REGISTER to a one
  and addressing Register 8 as an OFFSET of 0 
  and Register 9 as an OFFSET of 1.              */

/*** ***************************************** ***/
/*** These are the port addresses of the 8259  ***/
/*** Programmable Interrupt Controller (PIC).  ***/
/*** ***************************************** ***/

#define IMR  0x21 /* Interrupt Mask Register Port*/
#define ICR  0x20 /* Interrupt Control Port      */

/***  An end of interrupt needs to be sent to  ***/
/***  the Control Port of the 8259 when a      ***/ 
/***  hardware interrupt ends.                 ***/

#define EOI  0x20            /* End Of Interrupt */

/*** The (IMR) tells the (PIC) to service an   ***/
/*** interrupt only if it is not masked (FALSE).**/

/*** ***************************************** ***/
/***    INTERRUPT ADDRESS FOR COM PORTS        ***/
/*** ***************************************** ***/

#define IRQ4  0xEF            /*** COM1 & COM3 ***/
#define IRQ3  0xF7            /*** COM2 & COM4 ***/

/*** ***************************************** ***/
/***        GENERAL DEFINE STATEMENTS          ***/
/*** ***************************************** ***/

#define SBUFSIZ  4000

/*** ***************************************** ***/
/***               PROTOTYPES                  ***/
/*** ***************************************** ***/

int SerialOut(char Char_Value);
int SerialIn(void);
void interrupt far ReceiveData(void);
int IntSerialIn(void);
int SetPort (int ComPort);
int SetBaud(long Baud);
int SetOthers(int Parity, int DataBits, int StopBits);
int SetSerial(int ComPort, long Baud, int Parity,
			  int DataBits, int StopBits);
void Setvects(int ComPort);
void Resvects(int ComPort);
void EnableInt(int ComPort);
void DisableInt(void);
void InitSerial(int ComPort);
void CloseSerial(int ComPort);
void Assert(int request);
void Assert_Off(int request);
int Status(int request);