Intel 80386 - Full 32 bit processor 32 bit non-multiplexed address bus 32 bit data bus 32 bit internal bus 8 general purpose 32-bit registers - Integrated Memroy Management Unit 4 gigabyte physical address space 64 terabyte virtual memory support 4 gigabyte maximum segment size Optional On-chip Paging (a la VAX, 386 is THE UNIX machine) Full superset of 80286 MMU and fully compatible - Object Code Compatible with All 8086 Family Processors - Virtual 8086 Mode Allows running multiple 8086 tasks (read PC software) in a protected and paged system - Hardware Debugging Support 4 32 bit breakpoint registers allow breakpoints to be set in code or data - Optimized for Performance Pipelined instruction execution On-chip address translation caches 24 MHz clock max. (currently 16 MHz is the only available) 32 megabytes/sec bus bandwidth Sustained through-put between 3 and 4 million instructions per second. - Complete Development Support All existing 8086 and 80286 tools can be used C386, PL/M386, ASM386+system generation tools available from Intel now. Debuggers: PSCOPE, ICE-386 - CHMOS III Technology 1.5 micron feature size 280,000 transistors The 386 is a full 32 bit processor optimized for multitasking operating systems. The device comes in a 132 Pin Grid Array package and draws approx. 400 MA. The device is fully compatible with the 8086 and 80286 processors at an object code level and will run the same software. Intel has an AT which has been modified to use the 386 running PCDOS and other software including Flight Simulator. Intel also has XENIX-286 and RMX-286 running on the Intel System 310 supermicro. Intel has Multibus I cards with 32 bit memory which run at 16 MHZ 0 wait states and a Multibus II card will be available at the first of the year. The 386 architecture should be able to please everyone. Those educated in computer architecture will agree that segmentation is a good architecture (especially for multi-tasking systems). It is really the 64k byte segments that bothers programmers. Segmentation is still the basis for the 386 architecture but 64k segment sizes are no longer. Segments can now be up to 4 gigabytes in size (the physical address space). This should especially please those "flat" (read Motorola) architecture fans because if you point the segment registers at 00000000H (the beginning of memory) and set their size to 4 gigbytes (about ten instructions at initialization time) you now have a flat address space. Segment offsets can now be 32bits so you can address the whole 4 gigbytes and never have to think about segment registers. Register orthogonality has also been addressed (no pun intended). All eight registers can be used in all addressing modes for all things. All registers are a full 32 bits but can be accessed as 16 and 8 bit registers also. The 8086/286 registers are a subset. All conditionaljumps are now variable length and can have 8, 16, or 32 bit offsets. Numerous new instructions have been added especially in the bit manipulation area. These include bit set/clear/test/complement, bit fiels insert/extract, find first set bit, byte set on test, integer conversions (sign extend, zero extend), 32 bit mul. and divides. New addressing modes and data segment registers have been added and many old instructions have been enhanced. In spite of all these changes, the 80386 remains fully upward compatible with its predecessors. Performance - 3x - 8 MHZ 80286 for 16 bit code 4.7x - 8 MHZ 80286 for 32 bit code 17x - IBM PC .56 to 2.4 microsecond 32 bit multiply 2.4 microsecond 32 bit divide 17 microsecond task switch (saves context of whole machine) Availability - Intel is shipping 16 MHZ 80386's now. The current stepping of the part is B1. All the current 8086/286 runs on the 386 now so there is plenty of software. In addition Intel has ASM386, C386, and PL/M386 to support the complete 386 architecture available now to run on 386 machines including A-DOS from Phoenix, the folks who write BIOS. Hope this clears up some of the rumors circulating about the 386. Warren Sanasac